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Help with Taito Space invaders


Kevin77
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Hello everybody,

 

I'm doing my first arcade repair, it's a original Taito L shape space invaders board set.

Main board is a AA017742A the daughterboard is a SV070014A / SVN00003A.

I have a single testrom that should go in position H on the board working but only on position S (first rom slot on the board next to the SN74154).

Also have the TV version of 4 roms which had the test bild into the romset. Both test procedures work and say all ram passed, also all of the sounds work. But....this is the one i don't get, if i flip switch 4 on the board (rom test off) en try to boot the game i get a all black screen with the letter D in the middel.

I tried to change the ram on D, then i get another letter and so on untill i get back to the letter D again? Could someone explain this to me and where to look for a error/ short on the board.

What i do know is that if i logic probe the roms the first three roms show activity on all lines exept for rom 4 which had stuck lines on pins 18,20 and 21. I'm running 2716 roms on adjucted sockets, files on roms are double burned.

I will post a picture of the stappings im currently using. Hope some of the space invaders experts can help me out on this one and save another peace of history.

Thank you for all your help.

kind regards, kevin.

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What i do know is that if i logic probe the roms the first three roms show activity on all lines exept for rom 4 which had stuck lines on pins 18,20 and 21.

 

 

Hard to say without knowing what type ROMs are in those sockets. Someone could've put a different ROM in and patched the socket wiring around.

 

As for the RAM, if the RAM is OK, swap the other one on the same row. If that's not it, check the 74LS04, 74174, 74LS153, and the intel 8216s that the data passes through.

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Thank you for your answer, with 8216 i think you mean the two 74S241 Bus drivers. Both bus drivers have been replaced as all the 74LS04/174/153's. I think my problem is in the strapping for the board. I will post a picture of how the 2716 eprom sockets are made to fit the board.

Thanks again for the input.

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Perhaps it would be easier if it's possible that someone could tell me how the stapping should be for 2716's in this Taito board without having to mod the sockets. Thanks again.
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That's true, online there is enought to find about the midway boards but for the original Taito boards there is very little information. So im hoping someone has the same l shape taito boardset and could tell the world the correct strapping for 2716 eproms so if in the future some else runs into the same problem im having he will find a answer online :).

To everybody how chips in thank you.

Greatings.

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Hi, I don't have the L shaped board either but it is straightforward enough to read the circuit diagram and the PCB layout.

 

Firstly, position S1 on the PCB is the correct location for the 'boot ROM' which occupies addresses beginning at 0000

 

So the first ROM of the TV set, either TV01 or TV0H depending on revision goes in that spot.

 

The MAME driver for Space Invaders lists the TV eprom sets and their address ranges here:

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line] [/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_START( sitv1 ) // rev 1[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_REGION( 0x10000, "maincpu", 0 )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "tv01.s1", 0x0000, 0x0800, CRC(9f37b146) SHA1(0b7ef79dbc3de3beeae3bf222d086b60249d429f) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "tv02.rp1", 0x0800, 0x0800, CRC(3c759a90) SHA1(d847d592dee592b1d3a575c21d89eaf3f7f6ae1b) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "tv03.n1", 0x1000, 0x0800, CRC(0ad3657f) SHA1(a501f316535c50f7d7a20ef8e6dede1526a3f2a8) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "tv04.m1", 0x1800, 0x0800, CRC(cd2c67f6) SHA1(60f9d8fe2d36ff589277b607f07c1edc917c755c) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_END[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line] [/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_START( sitv ) // rev 2, minor bug fixes of sitv1; delay when writing to sound latch 0x05, and another unknown change[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_REGION( 0x10000, "maincpu", 0 )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "tv0h.s1", 0x0000, 0x0800, CRC(fef18aad) SHA1(043edeefe6a6d4934bd384eafea19326de1dbeec) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "tv02.rp1", 0x0800, 0x0800, CRC(3c759a90) SHA1(d847d592dee592b1d3a575c21d89eaf3f7f6ae1b) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "tv03.n1", 0x1000, 0x0800, CRC(0ad3657f) SHA1(a501f316535c50f7d7a20ef8e6dede1526a3f2a8) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "tv04.m1", 0x1800, 0x0800, CRC(cd2c67f6) SHA1(60f9d8fe2d36ff589277b607f07c1edc917c755c) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

ROM_END

 

Likewise in the original set which was labelled invaders.e, invaders f, invaders.g and invaders.h, 'h' is actually the 'boot' rom and would go in position S1 on this PCB

 

The test ROM replaces invaders.h so that's where it will work too. [TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line] [/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_START( tst_invd )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_REGION( 0x10000, "maincpu", 0 )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "test.h", 0x0000, 0x0800, CRC(f86a2eea) SHA1(4a72ff01f3e6d16bbe9bf7f123cd98895bfbed9a) ) /* The Test ROM */[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "invaders.g", 0x0800, 0x0800, CRC(6bfaca4a) SHA1(16f48649b531bdef8c2d1446c429b5f414524350) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "invaders.f", 0x1000, 0x0800, CRC(0ccead96) SHA1(537aef03468f63c5b9e11dd61e253f7ae17d9743) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

[TABLE=class: highlight tab-size js-file-line-container ]

[TR=class: cke_show_border]

[TD=class: blob-code blob-code-inner js-file-line]ROM_LOAD( "invaders.e", 0x1800, 0x0800, CRC(14e538b0) SHA1(1d6ca0c99f9df71e2990b610deb9d7da0125e2d8) )[/TD]

[/TR]

[TR=class: cke_show_border]

[/TR]

[/TABLE]

ROM_END

 

To work out the address strapping, first there is one quick question - are the EPROMS you have TMS 2716 or other type numbers?

 

This is critical as the TMS 2716 uses 3 supply voltages much like the earlier 2708 whereas other types don't and so they are not pin compatible with each other.

 

Let me know and we'll work out the correct position for the address strapping. Regards, John

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Hello John, thank you very much for your help. The eproms are Nec2716's.

The revision of the TV set i believe to be rev2.

The single testrom works on position one. Also the TV rev2 gamerom testprogram runs but as soon as i flip the selftest dip the game doesn't boot and gives a all black screen with the letter D, changing out the ram on that position starts a run around though the rams which eventualy gets me back to position D. Testprogram gives all ram oke.

To work around the pinout diffrence between the tms en nec 2716 the sockets have been modified as shown in the pictures above.

Thanks John, :cheers:

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Hi, thanks for that extra info. We're getting somewhere, here´s what I´ve worked out so far.

 

 

From your photos of the IC socket adaptor which was fitted I think the original ROM was a 2708 and a 2716 was to be installed in its place.

 

The only differences are pins 18, 19, 20 and 21

 

21 is VPP on the 2716, for programming so left disconnected

 

20 on the 2708 was /CE and this is linked to 18 as both pins 18 and 20 must be low to read the 2716

 

Here´s the interesting bit -

 

Pin 19 on the 2716 is A10 and this has been linked to ground.

 

So only the bottom half of the data on the 2716 in this position can be accessed.

 

That might have worked for earlier sets which used mixed 1k and 2k ROMs but the SI TV ROMsets are 4 x 2k and as far as I know (so far) the upper half of all 4 ROMs is used.

 

I´m working towards the strapping issue and will have more info soon.

 

By the way, take great care if desoldering those machined pin IC sockets as they are often a tight fit and can pull out plated through holes or lift tracks easily.

 

More to follow, regards John

 

 

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Hi again, here's some more information...

 

Firstly, I tried to recreate the situation where ROM 4 was only being read from the lower half - I took a dump of the ROM (TV version 2 ROM 04) and discarded the upper half, duplicated the data from the lower half so the same data would be read regardless of the state of A10. Substituted that for the original ROM dump and tested it in MAME

 

Interestingly it didn't stop the game playing but the graphics were completely wrong. The results on actual hardware may vary but I suspect that alone would not be the cause of the fault you have described...

 

I also noticed you mentioned that the EPROMs you are using were double burned which wouldn't be the case with the TV ROMset. Are you sure which version they are, or able to verify them against the checksums I've listed above?

 

Assuming the ROMset is correct for the TV version 1 or 2, here is the strapping for the 2716 EPROMs, using the full 2k address range for each, starting at address 0000:-

 

Notes:

 

In addition to the layout diagram you have provided, I've been referring to this image, found online:

 

http://www.andysarcade.net/pix/example.JPG - The strapping used in this image is not very clear and may not be correct (if the board pictured is using the TMS 2716 EPROMs, for example)

 

in addition to this set of circuit diagrams. All the connections below are taken from the component references in this schematic.

 

http://brentradio.com/images/Other/Docs/SpaceInvaders/taito_space_invader_l_shaped_board_schematics.pdf

 

Unfortunately The PCB layout doesn't show the exact location of each pad used for the address straps so I'm recommending you verify the connectons with a multimeter as you go:-

 

SW1 - looks correct in your picture, to confirm with a multimeter

The link should carry the AD9 signal from the 7408 at location 2J pin 11 (measure continuity from that pin to the wire link)

and go to A9 on each of the EPROM sockets, pin 22 (measure continuity from the wire link to the 4 EPROM sockets)

It should not be connected to +5V or ground (double check for no continuity to the +5 or ground rails on a nearby IC)

 

SW2 - may need changing

Goes to pin 21 (VPP) on the 4 EPROM sockets (confirm with multimeter)

The NEC 2716 datasheet recommends VPP should be connected to +5V during read (+25V to program)

Possibly connected to ground at present (check with meter) - if so remove existing link and add link to +5V pad nearby (check with meter)

 

Datasheet: https://elcodis.com/parts/5804540/UPD2716D.html#datasheet

 

SW3 - looks correct in picture but needs to be confirmed with meter

Goes to Pin 19 (A10) on the 4 EPROM sockets, should come from the 7408 at location 2L pin 6 (AD10)

 

SW4 - may need changing

Goes to pin 18 (/EP) on the 4 EPROM sockets (confirm with meter)

should be linked to ground but might be linked to +5V at present (check and change if required)

 

To arrange the 4 EPROMs into 2k banks starting at 0000, Addresses A11 and A12 need to go to the least significant inputs of the 74154 at location 1T

As only the first 4 EPROM sockets are populated the remaining two inputs are not required and should be linked to ground

 

https://pdf1.alldatasheet.com/datasheet-pdf/view/7826/NSC/74154.html

 

SW5 goes to 74154 1T pin 23 (confirm)

needs to be linked to AD11 which comes from the 7408 at location 2L pin 8 (use a meter from there to test each free pad to find the correct one)

 

SW6 goes to 74154 1T pin 22 (check)

needs to be linked to AD12 which comes from the 7408 at location 3L pin 6 (as above, locate pad using meter)

 

SW7 goes to 74154 1T pin 21 (check) - remove existing link and link to ground

 

SW8 goes to 74154 1T pin 20 - looks correct, should already be linked to ground (confirm)

 

Once you've removed the modified sockets and replaced them with new ones, installed the links as above that should fix the addressing for the 4 x 2716 EPROMs. (there may still be other issues with the PCB, though...)

 

P.S. here's the link to that MAME driver for Space Invaders which lists all the 'known' ROMsets and their checksums which can be used to verify your EPROMS...

 

https://github.com/mamedev/mame/blob/master/src/mame/drivers/8080bw.cpp

 

Hope this helps, regards, John

 

 

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Hello John, thank you very much for the troubleshooting. If it turns out i have to make the sockets complet (normal pinout) i could just add 2 pins to the bottem socket so no desoldering would need to be done. Ill try to work on the board next weekend and hope to know more after working through your great walktrough. Thank you for all your info, ill get back as soon as i know more.

:023:

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What a thread. I'm thinking of trying to use these strapping details for my SI. Mine is still running the original 2708 and while it is going in for repair, I think i should have the sockets replaced and get new ROMs put in it. The 2708's will fail eventually if they haven't already ( the board is currently u/s)

 

I'll start a new thread and let's see if there can be another SI which will come back to life.

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Picture

 

Kevin77, Any chance you could take some close up photos of the strapping? Just would be good to have some more detailed images rather than the blurry one at the top.

Thanks mate

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Just curious because i was wanting to double check the strapping on my PCB. With the blurry images at the top its hard to see but it looks as though the strapping on my board is the same as above. I was intending to have the board strapped for 2716.

1502436076_DSCN57452503.thumb.JPG.e43beffca32171cf8c9c35481860f511.JPG

689315151_DSCN57442502.thumb.JPG.4c932fb49c3010510f9ff1d6311963c6.JPG

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