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How game board components work


channelmaniac
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This will be a series of posts on how specific components work on a game board. Its purpose is to help you understand how the circuitry works. Feel free to add to the series if there's a topic you want to cover.

 

First up: Reset!

 

You'll typically see the signal defined as RESET with a bar over the top. In normal text like this where we don't have a bar over the top we write it with a slash in the front like this: /RESET. This bar signifies it's an Active Low signal. Normally the reset line is high (for most CPUs...) and you take it to logic low to reset the CPU and have it restart. Some CPUs will start up in a random state while others, like the Z80 will appear to be dead until you give it a /RESET pulse so without it the game will never start.

 

CPUs do different things when the /RESET is applied. They set the internal registers to a known state, clear interrupts, and start executing the program code. Z80s and many others start at 0000h (h = hexadecimal address) while the 6809 looks to address FFFE and FFFF for the 16bit address of where to start executing code.

 

So the first thing you check is for physical damage... the second, the clock, and the third is /RESET when a game doesn't want to boot.

 

If you have a logic probe with audio, it's easy to hear the logic level change of low to high when the game is powered on. That lets you know the reset circuit is working.

 

Some boards have a watchdog - if the CPU doesn't write to a location in memory, or do something else like read it to periodically reset the watchdog, the watchdog will reset the CPU. This is normal and signifies something else is wrong. More on that later in this series.

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Second up: Clock!

 

The clock circuit sets the master frequency at which the game will run. All other frequencies or clocks are derived from the master by dividing it. Clocks can be simple crystals driven by transistors, by 7404 chips, or by 74368 chips. There are others too, but these are the common things you'll find. Once you have that master clock it gets divided down to the various frequencies needed to synchronize horizontal and vertical positions on the screen for graphics elements and more.

 

Clocks can be divided by using flip flops like 74LS74, 107, etc... or by using counters like 74LS161 or 163... or by others. These are common ones you'll see. Check Pac Man, Centipede, Track and Field, and many others to see how the clocks are divided down by those counters. The counters are common fail items too. When they start failing you'll have odd graphics problems, loss of sync, multiple images on the monitor, or other oddities. Clocks must be stable before you troubleshoot anything else on the board.

 

Luckily with a logic probe with audio it's easy to hear the progression of the clock dividing by the different tones.

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Third: Interrupts!

 

Interrupts are ways for the circuitry to tap the CPU on the shoulder to say "hey, go service this real quick" to which the CPU will, the it goes back to what it was doing. This allows for the CPU to do things like account for vertical refresh on the monitor or send data to the sound subsystem to play music or effects.

 

You have two types: interrupts (/IRQ) and non-maskable interrupts (/NMI) where an NMI simply is an interrupt the CPU cannot mask, a.k.a. ignore.

 

If the interrupt is stuck on (/IRQ or /NMI) the CPU may not start. Z80s will not start if these lines are stuck low so this is one of the items you check when trying to fix a game.

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Let's look at components and how you access them. This is important to understand before you get to subjects like address decoding.

 

ROMs / EPROMs!

 

The common ROM or EPROM has two enable lines and to simplify it, Chip Enable is the power control and used for device selection. It's written with a bar over top of the name of the signal, or with a slash when you're doing common text like this /CE, which signifies it's active low. The chip does nothing (that you can see) when the pin is at logic high or tied to +5v. Putting this line high puts ROMs or EPROMs that have a standby mode into that mode where they draw very little power.

 

The second line is the /OE or Output Enable. It is active low as well and is the output control for the chip - can it or can it not output data to the bus. You can have /CE low, but without /OE low, the chip can't output its data to the bus.

 

Mask ROMs are ROMs that are pre-programmed at the time they are created. They are programmed by the masks in use as the layers get deposited on the silicon substrate when the chip is created. Bipolar PROMs are programmable ROMs that you program by blowing tiny microscopic nichrome (or similar) metal fuses. When dealing with older versions of these like the 9316, 9332, or older, you'll get into ones with different pinouts and different polarities on the enable lines (enable high vs. enable low) - so refer to the schematic when you're looking at these.

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Static RAMs!

 

Static RAMs operate like EPROMs, with /CE and /OE lines for Chip Enable and Output Enable, and if you recall from earlier posts the / means they are active low signals. However, Static RAMs have a R/W line for Read and /Write control.

 

When the R/W line is Active High AND the /CE and /OE are low you can read the chip.

When the R/W line is Active Low AND the /CE line is low you can write to the chip. It doesn't matter the state of the /OE line in this case...

 

Here's a Truth Table from a 6116 SRAM data sheet showing these conditions:

 

1616032107_truthtable.PNG.2d7eb57a01a4b6f71a6807cb0dc5e885.PNG

 

Notice the standby when /CS is high. You can put these chips into Standby mode, but some have a special low power standby (often with a suffix of L on the part # for the chip) for use with battery backup circuits where they draw incredibly low amounts of power to store the data. This is why when you replace a RAM in a battery backup circuit you must make sure the replacement has that very low power mode. If you don't you'll drain the batteries quickly when the power is off.

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Addressing!

 

Computers operate at a basic binary level - zeros and ones. An address of 255 is written as FF in hexadecimal or 11111111 in binary. If you were to have a memory chip that is 256 bytes in size you would have 8 address lines A0 through A7 for a total combination of 255 (plus zero to give you 256 memory locations.)

 

Rather than teach you counting in binary, go here.

The same for hexadecimal counting. Go here.

 

If you need more space add another bit. 9 address lines gives you 512, 10 gives you 1024 (1K), and 11 address lines gives you 2K.

 

Here's the pinout for a 6116 SRAM - a 2K x 8 bit static RAM

 

6116.PNG.afbffa8343919763dd345110b37db254.PNG 1883494126_pinnames.PNG.88cb0c6a4af1bb7e040c938f3284fdb4.PNG

 

You can see the 11 address lines from A0 through A10. It might be confusing at times, but the controls are the same - R/W, /OE, and /CE, even though they label them slightly different.

 

Need 4K? Add another address line... but they really didn't make many 4K SRAM chips, they went to 8K, 16K, 32K, etc...

 

Now the typical 8-bit CPU in an arcade game has 16 address lines. A0 through A15 (although, don't be confused that some manufacturers call them A1 through A16, they are still the same number of address lines) which gives you 2^16 amount of bytes for the address space. 1111111111111111 (16 1s) = FFFF in hexadecimal (often labeled with an h like FFFFh) = 65,536 total addressable memory locations - zero through 65,535. By changing the combinations of zeros and ones on the address line you get access to the different memory addresses in that 64K memory space.

 

0000000000000000 = 0000h = address zero

1000000000000000 = 8000h = address 32768

1100000000000000 = C000h = address 49152

1100000000000001 = C001h = address 49153

 

But how do you get multiple 8KB RAM and ROM chips that only connect to the same A0 through A12 address lines to read at different addresses? That's Address Decoding! That's next.

6116.PNG.7fe4234272dada6f8223c0829c3cd000.PNG

292582119_pinnames.PNG.9ae39cb3145fff7245f81e739110b3f2.PNG

Edited by channelmaniac
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Address decoding!

 

Address decoding is the method in which you take multiple address lines and decode their binary value for assigning resources (RAM, ROM, memory mapped I/O chips, etc...) to a specific location in memory.

 

For example: You have multiple 8K RAMs and ROMs you want to connect to a CPU, doesn't matter what kind for this exercise... You can fit 8 of them in a 64K address space without doing any fancy memory banking. 8 * 8K = 64K. BUT, how do you do it when they all have the same address lines from A0 through A12 tied to them? You decode the Address lines above them.

 

Binary tells us we'll need 3 address lines for decoding for 8 devices - A13, A14, and A15, the top three address lines. Their values in binary would map the memory areas.

 

A15 A14 A13 =

0 0 0 0000h to 1FFFh - Device 0

0 0 1 2000h to 3FFFh - Device 1

0 1 0 4000h to 5FFFh - Device 2

0 1 1 6000h to 6FFFh - Device 3

1 0 0 8000h to 9FFFh - Device 4

1 0 1 A000h to BFFFh - Device 5

1 1 0 C000h to DFFFh - Device 6

1 1 1 E000h to FFFFh - Device 7

 

Don't forget the other 13 address lines... where 0000000000000000 = 0000h to 0001111111111111 = 1FFFh is where the 13 address lines going to our 8K chip change. Those along with the top 3 address lines are how we map ROM and RAMs into specific memory spaces.

 

Now, how do you decode those upper 3 lines? You can use a 74LS138 3-to-8 BCD Decoder. That's a common way.

 

LS138.PNG.96e132e9844084197207aa1756f3b680.PNG 580795783_LS138table.PNG.9b4343d20223324a0d190a7406986743.PNG

 

A15 - Connects to A

A14 - Connects to B

A13 - Connects to C

 

Ignore the /G2A, /G2B, and G1 signals for now. Those are enable lines for the LS138.

 

Based on the logic level of A15, A14, and A13, we'll get one of the outputs to go low on the LS138. See the Yellow encircled area on the logic table. Tie one output to each 8K RAM or ROM to map your chip into the memory address space.

 

Y0 to /CE of a 2764 EPROM puts it at 0000h to 1FFFh

Y1 to /CE of a 2764 EPROM puts it at 2000h to 3FFFh

Y4 to /CE of a 6264 SRAM puts it at 8000h to 9FFFh

 

If your address decoding has faults the CPU will never be able to read the ROM for its instructions or write data to RAM to function. It will be off in LaLa Land.

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Basic Logic!

 

We've seen these symbols on a schematic, what are they and what do they do? Chip part #s are included throughout this so you can pull down the datasheet on each part and look through it if you wish. The logic diagrams and Function Tables are in the datasheets and you should look through them as you look through this post to see how to read them. You can download them from the datasheet archive web site.

 

AND Gate

 

An AND gate (7408, for example) looks like this:

 

AND.PNG.2fb82116b1957d8758500580361ace2c.PNG 53133240_ANDTable.PNG.964818c18a7058462ebe825e9c372405.PNG

As the name suggests, each input must be high for the output to be high. A AND B must be logic HIGH for the output to be HIGH. If either input is low, the output is low. The X in the Function Table is "Doesn't Matter" If an input is low, it doesn't matter what the other input is... the output is low.

 

OR Gate

 

An OR gate (7432, for example) looks like this:

 

OR.PNG.f5585d7ae0f22160f39a2f132275fd3a.PNG 1205301316_ORTable.PNG.7d8330285f70b81d9de684f3284e46ad.PNG

 

And this one operates where the output is high if only one input is high. IF A OR B are high then the output is HIGH. Again, the X in the table is "Doesn't Matter." If an input is high, the output will be high, no matter what the other input is.

 

Buffer Gate

 

These are often used to drive signals on output like Sync output to a monitor (7407), or to drive outputs to shared bus (74367) and look like this:

 

Buffer.PNG.87f8334e678adc7fffa2bbf0b776a87d.PNG 1600905347_BufferTable.png.7e954619b7e412e6e025fb406ead5dc2.png

Whatever the input is, the output is identical. If the input is high, the output is high. If it's low, the output is low.

 

Inverter (NOT) Gate

 

An Inverter gate (7404, for example) looks like this:

 

Inverter.PNG.8c501d6aee4705c78d26ba2b9ac081f6.PNG 1952177875_InverterTable.PNG.ae0813b7948ddda42b2ba779d8aea6da.PNG

Whatever the input is, the output is the opposite. If the input is high, the output is low, and vice versa. You can identify the inverting gates by the circle on the output side, but sometimes, you'll see the circles drawn on the inputs. This chip type is unique as it's possible to use in an analog mode to drive a crystal into oscillating in a clock circuit. You'll often see a 7404 or a 74368 used for this.

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Basic Logic continued!

 

We've seen these symbols on a schematic, what are they and what do they do? Chip part #s are included throughout this so you can pull down the datasheet on each part and look through it if you wish. The logic diagrams and Function Tables are in the datasheets and you should look through them as you look through this post to see how to read them. You can download them from the datasheet archive web site.

 

NAND Gate

 

A NAND gate (7400 for example) looks like this:

 

NAND.PNG.43c98a529e416a22ea829ba348a0d3ce.PNG 1505538330_NANDTable.PNG.15eeeae34f73525e0a989df0d04d6b09.PNG

 

As the name suggests, it's an AND with a NOT (inverter) combined, so each input must be high for the output to be low. A NAND B must be logic HIGH for the output to be LOW. If either input is low, the output is high. The X in the Function Table is "Doesn't Matter" If an input is low, it doesn't matter what the other input is... the output is high. It saves you a chip by not having to put an AND gate into a circuit followed by an Inverter where you need the output flipped.

 

NOR Gate

 

A NOR gate (7402) looks like this:

 

NOR.PNG.b92f201b6821f72e174036e30f50a84d.PNG 322100144_NORTable.PNG.88d046dc14fbec2099a87fc65e4da1c1.PNG

And just like the NAND gate, this is an OR gate followed by an inverter. If an input is high, the output is low, and if both are low, the output is high. A OR B must be HIGH for the output to the LOW. Remember that the X in the Function table is "Doesn't Matter." Like the NAND gate, this saves you a chip in your designs where you need to OR a signal then invert the output.

 

Exclusive-OR Gate

 

An Exclusive-OR gate (7486) typically looks like this:

 

695659666_ExclusiveOR.PNG.04704f56f6033ddeb8accba88b2a94f1.PNG 1614978621_ExclusiveORTable.PNG.f8cbafd5348be17af0ae05ff940e0f89.PNG

This one is a bit different, the output is an OR gate, but the the inputs are Exclusive. If ONLY an input is high, the output will be high. If BOTH inputs are high, the output will be LOW. A Ex-OR B must be HIGH exclusively. If both are HIGH the output is LOW. if both are LOW the output is LOW. You'll often see these in clocking circuits where you're sending either the clocking signal OR the address line to a ROM or RAM, but not both. They are also found in Sync circuits where you are combining the horizontal and vertical sync signals into a composite sync for driving the monitor.

 

Exclusive-NOR Gate

 

An Exclusive-NOR gate (74266) typically looks like this:

 

187629565_ExclusiveNOR.png.29c967bcd2968aeaf35c999b6997ee42.png 1325853184_ExclusiveNORTable.PNG.992c202539a56e574079858b7fd337bb.PNG

Like the Exclusive-OR, but with an inverted output. If ONLY an input is high, the output will be low - remember the inputs are exclusive. If BOTH inputs are high the output will be HIGH. A Ex-NOR B must be high exclusively. If both are HIGH the output is HIGH. If both are LOW the output is LOW. I don't recall ever running across this in a game, but it's a basic logic element that you should still be familiar with.

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Logic inputs and outputs

 

You'll run across these terms and should be familiar with them:

 

Tri-State

 

This means the output support 3 different states of operation. First is Logic High, second is Logic Low, and the third is Hi-Z, or High Impedance, which means the chip basically disconnects itself from the logic bus and isn't sourcing or sinking any current on the bus.

 

Open Collector

 

The gate output is simply a collector off a transistor. These type of gates can only sink current and not source it. In other words, they can only drive a Logic Low condition. A 7407 is an example of this on a simple logic gate. An 82S23 is a 32 x 8bit PROM with this type of outputs. You'll see these in circuits with a resistor on the output. The resistor pulls the circuit up to a logic high from which the gate can pull the signal down to a Logic Low. The resistor is high enough in value to limit the current being sunk to ground to a safe level for the IC.

 

Schmitt Trigger

 

These have a special input that can be used for slow rise signals and they will "square up" those signals. A 7414 is an example and the 74HC14 is commonly used to square up signals on light gun inputs and can be found on Seattle boardsets, Atomiswave, and many other gun games. They have a special symbol inside their logic gate symbol, but it's often just not used on the schematic. Instead they'll use the standard logic symbol and have the part number specified.

 

161349189_SchmittTrigger.PNG.19ad2807947c55762111200b1f6fd888.PNG

 

Edited by channelmaniac
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Let's talk Data Bus!

 

The Data Bus carries instructions and data from the CPU to and from the RAM, ROMs, I/O devices, and other parts of the game. Some games have one simple bus, others like Pac Man have a module and a latch between the CPU and ROMs and the RAM. The ROMs and CPU are on the red data bus while the RAM is across the Blue.

 

1059953185_PacManDB.PNG.28d4f8757d5698e7f9395399b2028d44.PNG

This is important to understand for troubleshooting. If you have a stuck bit on a data bus, where is the bit stuck? On the ROM side? Across the Sync Bus Generator module to the blue side? Narrowing down where the bit is stuck will let you ignore larger parts of the circuitry and concentrate on one smaller area.

 

Now, the CPU is characterized by the number of data bits it processes - 8-Bit, 16-Bit, 32-Bit, etc. and is numbered from D0 - D7 for 8-Bit, D0-D15 for 16-Bit, and as you can guess D0-D31 for 32-Bit. When you get to the wider bits you either have to use specialized memory that is 16 or 32 bits wide or use multiple chips. You'll see most arcade game boards up through the Neo Geo using multiple RAMs. Some, like the Seattle boardsets use 16-bit wide RAMs in the video section, but 8-bit RAMs in other areas. Those 8-Bit RAMs are divided up where one will handle D0 - D7 and the second will do D8 - D15 to round out the 16 bits needed for, say, a 68000 CPU.

 

The memory data locations are typically written in hexadecimal (Base 16, see post above for a link to learn about that), to make it easier to understand than binary. Why not Base 10 and just say 255 instead of FF? Well, when troubleshooting it's MUCH easier to go from hex to binary to determine what bit is at fault than to convert from Base 10 to binary.

 

Look at this Neo Geo error for example:

BACKUP RAM ERROR at D0000000

Written: 5555 Read: 5545

 

What is it and what does it represent?

 

It represents an error in one particular bank of RAM and the data is written in MSB - Most Significant Byte first. If you look at the patterns, you'll see 5555 in hex which is 0101 0101 0101 0101 for a total of 16 data lines. MSB means it goes from D15 down to D1 when reading from left to right. The 5554 read back is 0101 0101 0101 0100, in which D0 represents the bit that is wrong. The upper 8 bits are handled by one memory chip, the lower 8 bits by another. Looking at the pinout of the 68000 CPU, we see this:

68000.thumb.PNG.91a95882e928206f959d49f3b9654f51.PNG

Where D0 is pin 5 of the CPU. To find the Backup RAM, you look at the power pin (pin 28 of the 62256 SRAM) and see if it connects to +5 or to the battery backup circuit. The Backup RAM connects to the battery. The Work RAM and Video RAM connect to the +5 instead so you can ignore them. Next see which 62256 SRAM has its data pin connecting to pin 5 of the CPU. That will be the low byte RAM that you need to replace!

 

Sometimes you just can't tell why a data bus is stuck. When that happens, measure resistance from the data bus pins to +5 and ground and look for shorts or abnormally low resistance to try and narrow things down. A bad ROM or RAM will cause it to be stuck as well. Address Decoding could be an issue too! If the IC is being enable to output data to the bus at the wrong time, it will crash the CPU and cause the game to not boot. This is commonly seen on the Neo Geo game when the battery leaks and eats the traces around the 74HC32 which controls the /CE and /OE signals along with the R/W of the Backup RAM. When those pins float the RAM will send spurious data to the data bus and crash the CPU.

 

Sometimes you can't find missing or stuck control signals, the ROMs look good, and you're left wondering... Then it's a bit tougher and you'll have to look at desoldering the work RAMs and other RAMs on the bus to find the fault. This is where advanced tools like a Fluke 9010 CPU Exerciser comes in very handy.

 

Just remember, start with the basics and make sure that clock and /RESET is working first before you start digging into the data or address busses.

 

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​My logic probe shows this gate is stuck, yet my logic comparator says it's good. Why?

 

Well, if you recall an AND gate from the discussion above, it requires both inputs to be high for the output of the gate to be high. Think of it as the logic state of the inputs to the gate at a moment in time - Are both gates high at the same time? A logic probe can only show you one signal at a time so you never get that 'state' information.

 

Look at this 3 output signal generator. Outputs 1 and 2 are set to generate a 10MHz square wave from 0 to 5v. Output 3 is off. It's set to 0 degree phase meaning the signals are in phase with each other.

 

2075921710_IMG_20200417_2212541311.thumb.jpg.a8f8f36598989cc4afee051623cbe4b7.jpg

 

It looks like there's only one square wave... both outputs are high at the same time so the output of the AND gate would be high.

 

Look at this output when we shift the phase slightly to 90 degrees for Channel 2. Notice that for only 1/2 of the previous time are both gates high at the same time. Your output pulse just narrowed by 50% and the audio tones output by your logic probe (You DID buy the one with audio tones, didn't you???) will have changed.

 

2066761091_IMG_20200417_2213087791.thumb.jpg.39471eea2b7a2af467490d24fab85593.jpg

 

Let's shift it a bit more... to 160 degrees out of phase. Suddenly only a small sliver of time exists when both A and B are high at the same time so your output is only high for that tiny sliver of time. In some circuits it might not even be long enough for your logic probe to register. You might to have flip the Mem switch on the logic probe to catch the short signal.

 

8892470_IMG_20200417_2213224501.thumb.jpg.37943add443c63d1a65bd622c0094da3.jpg

 

And finish the shifting... 180 degrees out of phase. At this point your output is low because there is no time when both inputs are high at the same time.

 

1403153430_IMG_20200417_2213360981.thumb.jpg.33b0372a9c1754d47e98f26196146b57.jpg

 

To measure state you need something that can see the inputs and outputs at the same time. A 2-channel oscilloscope can only show buffers or inverters. A 3-Channel scope can show 2 inputs and an output, 4-Channel can show 3 inputs and an output at the same time. For more channels, you'll use a logic analyzer. To view the whole chip, a logic comparator like the the HP 10529a

 

 

Edited by channelmaniac
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Next topic: Dynamic RAM chips

 

If you notice, 8k x 8 static RAM chips have 28 pins on them to have enough pins for all the address lines necessary to read all the memory locations on the chip. So how in the world, do you get 64K (65,536!) memory locations in a 16 pin package?

 

1221773070_4164pinout.PNG.71dc703c3c63882a9f56e4cf34c4b7ee.PNG

Easy! You multiplex them <scream!>

 

If you recall from previous posts, if you have 16 address lines you have 65,536 addressable locations in memory. It's 216 , which is 65,5356 (0 through 65,535.)

 

So you notice there are 8 address lines on the 4164 - A0 through A7. You feed it the appropriate R/W (read or /write) signal, data on the input (if writing), send the low address lines and toggle the /RAS (Row Address Strobe) line, then you feed it the upper address lines and toggle the /CAS (Column Address Strobe) line. Inside the chip it takes the row and column and stores the data or copies the data to the data output pin if doing a read.

 

What makes DRAMs attractive are their high densities - lots of memory in a tiny package. What makes them unattractive is complexity - the need to periodically refresh the micro scale storage capacitors inside the chip (one per memory cell) to keep the data intact and the need to multiplex the address lines.

 

To do the multiplexing you'll often find 74LS157 or LS257 chips being used. These are 2:1 data selectors and can be used to select which address line signals get sent to the memory. Look at this schematic section from a Commodore 64SX computer:

 

1807744523_SX64RAM.PNG.b9ff910bc642af42198b6722838e5d9f.PNG

 

Here you can see the address lines going to the multiplexer. A0 or A8 goes to MA0 (Memory Address 0) depending on the state of pin 1 (/SELA - Select A input when low, B when high) of the LS257 chips at UA3 and UB3.

 

When troubleshooting these you must make sure the /SELA line is being toggled, the /CAS and /RAS lines are being toggled, memory data bus lines aren't stuck in a high or low state, and that the outputs of the data line selectors multiplexing the address lines are working and aren't stuck. It helps to have a logic comparator when testing those LS157/LS257 chips to make sure their outputs are correct. Otherwise you'll need a logic analyzer to truly see if they are working. Now you can tell obvious shorts to high or low on their outputs and it's obvious when an output is racing, but other states can be difficult to detect.

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Time to look at Watchdog circuitry!

 

A watchdog is like your dog at home... if something is amiss it barks. In the case of the game board you have a CPU that periodically gets interrupted by tasks that have to be repeatedly done like service video during horizontal or vertical blanking intervals.

 

Now the watchdog circuit needs periodic resetting or it will automatically fire off and reset the CPU. Normally the CPU will do this as part of servicing something it does regularly like servicing an interrupt. If the CPU doesn't reset the watchdog circuit it will have its reset line activated to try to restart the CPU and get it to work. However, if the CPU cannot boot the watchdog will sit there and hammer the reset line over and over and over to infinity or you turn off the power. This is referred to as "stuck in watchdog" and when it happens you have to figure out why the CPU won't boot.

 

Start with the basics:

  1. Clock
  2. Program ROMs - are the corrupt? Corroded pins? etc...
  3. RAM - the first bank of RAM must be good or the game will typically not even try to do self tests.
  4. Address/Data bus issues - bad buffers/latches between the CPU and the ROM/RAM, for example.
  5. Address decoding issues
  6. Stuck Interrupts - This will keep a Z80 from booting.

Basically, anything that can cause the CPU to not boot will cause problems like this. On Neo Geo games it's common for the battery circuits to corrode and eat traces. The control signals and backup power for the Backup RAM comes from that corroded circuitry and when damage happens it's common for the control signals to be at the wrong logic level or to float. This causes the Backup RAM to spuriously output data to the Data Bus and crash the CPU.

 

Some games (Centipede is one!) will let you disable the watchdog circuitry by adding a jumper temporarily to the board. This can be helpful in letting you see more of what is happening on the busses with your logic probe or oscilloscope, but most games won't have this.

 

Take your time and have patience when dealing with stuck in watchdog and remember - anything that keeps the CPU from booting could be the cause of the problem. You'll have a list of items to check!

 

Enjoy!

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Resistors!

 

These are so dang simple but people get them so confused. Resistors do what they say, resist the flow of current in a circuit. They come in many different forms - adjustable (pots / potentiometers / rheostats) or fixed. They are made by using packed carbon in a package, thin carbon film over a carrier, thin metal film over a carrier, or wirewound.

 

Resistors do not fail shorted. They fail by going UP in value or by going open, not shorted. Potentiometers fail by going intermittent, getting dirty (static), or just breaking physically makes them go open.

 

Take monitors for example. There are plenty of resistors limiting current to other parts of the circuit which lets you ignore those parts for blowing fuses. You can calculate the current based on the voltage and resistance if you wish.

 

Say F501 (fuse) is blowing. It takes some good current to do that, but if you look at the path the current takes, you'll see there's a limited path for that much current to flow without burning resistors up.

 

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The path has lots of parts on it. Caps can short or blow up/open, semiconductors can short, resistors do NOT short. They go up in value when they get damaged. They also show obvious signs on heating. So, if you have a blowing fuse you can do the current calculations and determine that it can't be because of R507, R502, R311, R313, and R363 and since those resistors aren't burned up, you usually can ingore that segment circuitry beyond them.

 

Capacitors CAN short, but the electrolytics usually vent or explode when that happens because of the heat and pressures generated inside of them. So that's C404, C507, C501 (all low risk), and C363 (high risk) which are suspects. It's rare for the ceramic caps to go old and die, but common for semiconductors.

 

Semiconductors can go leaky when they fail, but usually simply short circuit. When D501, D502, D503, D504, or IC401 shorts the fuse will blow.

 

Sure, current flows through other paths, but if you have a bad path you'll usually have a burned resistor. Take the +175v source, for example. That comes off the flyback, through R702, through a high frequency Schottky diode (D702), and over to a cap. When the diode fails, the resistor will burn up because of the extra current flowing through it, but the fuse will rarely fail.

 

Now, can you replace a resistor with another resistor, even an old one? Yes, usually. BUT... You really don't want to put a carbon or a carbon film resistor back where a metal film resistor was - they are fire hazards. The metal film resistor (a.k.a. Flameproof Resistor, a.k.a. Safety Resistor) will open up before it catches fire but the older carbon and the carbon film reistors can catch fire, possibly destroying the PCB material under it. Some monitors use special non-inductive high wattage resistors. You cannot replace those with standard wirewound high wattage resistors as those will have inductance which could cause the ciruit to not work, or worse to perform incorrectly.

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Thank you for the great series!

 

Any drawbacks to replacing a solid carbon or carbon film with a metal film one?

 

Nope, metal film just have better tolerances than carbon. Just be sure the power rating is the same. Eg: 0.25W, 0.5W, 1W etc

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Nope, metal film just have better tolerances than carbon. Just be sure the power rating is the same. Eg: 0.25W, 0.5W, 1W etc

 

Isn't solid carbon meant to have a better frequency response? Or is that just because it isn't wirewound...?

 

 

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I'm going to be turning these tidbits into training sessions, done live over Google Meet through Dallas Makerspace and inviting the folks from the Computer Reset Liquidation Group on Facebook. They are a bunch of retro computer collectors and this would all fit in nicely there. Also, I'll be posting recordings to my YT channel.

 

Speaking of which... I did a class for Bad Caps last night. I recorded it via Camtasia since DMS' subscription to Google didn't include recording for Meet which would've been extremely expensive for supplying it for every member. Camtasia records my mic and the incoming audio feed so it recorded an echo for audience questions that wasn't there during the live delivery, so please ignore that when giving me feedback.

 

 

I'm surprised YT let me put up a video that was almost 2 hours long. :)

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