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    Thread: Help with 1942 arcade ROM sizes

    1. #1
      d18c7db is offline
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      Help with 1942 arcade ROM sizes

      Can a kind soul (perhaps someone who has worked on repairs on these boards) please answer a question for me.
      I need to know what the deal is with the ROMs on the 1942 video board (I don't have a real board or I'd look at it myself).

      The schematic of video board 02A on page 6/8 shows ROMs L1, L2 (labeled as 2764x2) and N1, N2 (also labeled as 2764x2) as having address lines A0..A12 which is normal and expected from 8KB ROMs.

      The problem is that all ROM dumps available online such as those used with MAME have these ROM files as 16KB each (which would imply 27128 ROMs)!

      So on a real board then, either the ROMs are really 16KB but only half of them are used or the schematic is wrong, in which case, where is the ROM address line A13 (pin 26) connected to?

      Cheers

      Alex

    2. #2
      Womble's Avatar
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      This happens a number of times across Arcade history, as the price sweetspot of EPROMs trended downwards. EPROMs were very expensive parts, but at the cross-over point they bought whatever was the cheaper option on the day procurement were hunting. You see the same thing with RAM chips, and also this searching for the cheapest option with TTL ICs, that's why you see such a mix of manufacturers on a PCB, rather than every single 74LS chip from the same manufacturer (they all made the standard range after all), it just came down to price, and saving 2 cent on a chip by choosing a different manufacturer, across a PCB production of 10,000 boards was worth doing.

      PCBs produced at the time these sweet-spot crossovers happened were often designed so they could take both sizes, so in the case of 1942 the board could be configured to take either two 2764s (using both sockets), or a single 27128 only using one socket, whatever option was cheapest for that run of 10,000 PCBs or so.

      If you look at the pinout of both 2764 and 27128s they are both 28 pin EPROMs, the only difference being pin 26, which is NC (not connected) on 2764 or A13 on a 27128.

      The schematics probably show the jumper which either takes A13 from the CPU direct to pin 26 on one of the sockets, or directs it to an OR gate on a TTL chip that feeds the Output Enable pins to select between two 2764s (via an inverter on a split output)

      Often later board runs, once a crossover point had passed, would dispense with the second socket (saves a few more cents) and hardwire the jumper, but the spaces will still be on the PCB as redesiging the board was a very expensive option.

      So in the case of the MAME files it is just that the board that was dumped was using 27128s, but you can chop those files in half in a hex-editor and get the contents of the two 2764s.
      Sic transit gloria Atari!

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      Thanks, that would make sense in principle but in this case the problem is that this doesnít apply.

      All ROM dumps are double the size so I have four 16KB ROMs that I need to fit in the space where four 8KB ROMs would go.
      I have also checked that each dump contains unique data so itís not like a 8KB ROM was dumped like a 16KB and the data is duplicated twice. This is also on the video board so the address doesnít come from the CPU but other logic. If it was the CPU board Iíd just hook A13 to address bus and hope for the best but on the video board I canít easily see what would provide this extra address line.

      BA9294F7-63AA-4C88-9A08-7F8FEFBE3D76.jpg

      There is the schematic. As can be seen AD6 feeds into A12 then AD7 is used as a bank select. I have four ROM dumps for L1,L2,N1,N2 each dump is 16KB. How do I connect 16KB ROMs according to that schematic? Why are the dumps 16KB each and not 8KB. Are there different hardware revisions? Is there a schematic for those ? Iím really confused.

      Anyone know the answer?
      Last edited by d18c7db; 12th July 2018 at 09:47 PM. Reason: Added picture

    4. #4
      Womble's Avatar
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      In that case you don't have the right ROMs for the PCB described by that schematic.

      What are you trying to do?
      Sic transit gloria Atari!

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      All versions of 1942, 1942a, 1942b MAME ROMs have the same size 16KB ROMs. I haven’t seen any other versions.


      I’m doing a FPGA implementation. Main board works including sound. Video board shows garbled image (I wonder why heheh) so I’m still debugging that. I literally just finished transcribing the schematic to VHDL yesterday so I have some debugging to do.

      My question therefore remains, why are all the MAME ROM dumps for those ROMs 16KB when the schematic shows 8KB ROMs.

    6. #6
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      Sorry, You checked the roms.....
      Ask at Mame irc, People there would be able to answer your technical details.

    7. #7
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      I suspect the schematic is just wrong, a lot of them have errors.

      I don't have a 1942 PCB anymore, otherwise I could buzz it out.
      Sic transit gloria Atari!

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      Ok thanks guys. I’ll see what I can find out elsewhere.

    9. #9
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      The MAME guys on irc reckon that A13 for those ROMs is provided by vover which comes from latch K6 on previous schematic page. Iíll give that a try.

    10. #10
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      Just to finally close this topic, I can confirm 100% that the ROMs I mentioned before need A13 address line connected to VOVER signal, despite the fact that the schematic doesn’t even list an A13 address line for those ROMs

      I have published the VHDL code at https://github.com/d18c7db/FPGA_1942 which as the readme file there says, is playable but there is a minor issue I’m aware of in the sprites.

      I’ve beem “taking a break” from fully finishing 1942 by implementing Atari’s Gauntlet arcade game which I found interesting. I don’t have anything to show yet with Gauntlet as it’s totally non functional at the moment despite 15 pages or HDL code I’ve written so far. Been spending lots of time translating the schematic to VHDL and reversing the custom chips like the PFHS, GPC, SYNGEN etc by looking at old Atari schemas when these chips were still implemented with discrete TTL components before they got turned into custom LSI

      To be honest I may not be able to fully finish Gauntlet as the speech synth chip will be a major challenge and also the amount of ROMs it uses may well be too big to fit in the FPGA though that particular problem may be solvable in the same way I solved it when I wrote Bomb Jack and stored the ROMs in external SRAM

      Cheers
      Alex

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