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    Thread: Williams SS sound board synth

    1. #21
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      There is a gig coming up for the Melbourne Fringe Festival via Clan Analogue, due to take place on the 15th Sept at Bar 303 in Northcote, hopefully everything will be working

      I finished the first pass into the emulator of the defender rom code i have figured, but unfortunately the emulator im using doesnt recognise the opcode for FCB or FDB which is how all the waveforms are stored. so that kinda breaks that attempt. I have a few sounds boards coming so maybe i can turn one into a programmer of sorts...

      Anyway a third type 1 board has been checked out and is ready for use in the live kit. The case im using however needs to be reconfigured to fit the new board, so theres a bit of whittling of mdf to be done

      Heres a pic of the test for the 3rd board breaking out of the suitcase:

      old-demo-case-3rd-card.jpg

      and then after a rebuild the cheapo suitcase now has 3 boards mounted vertically with room for the 3 controllers, Raspberry Pi (which will also be mounted vertically) and maybe the PSU...

      3card-demo-case.jpg

    2. #22
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      This is as far as i can get with the emulator so far. I stepped the defender rom to watch the registers and memory locations to try and figure out whether I have got the routines correctly identified. For this run I org'd it to $0500 so that the ram and dac locations were free to be written to as the program runs. There are rem'd BRA to self places, etc, where the program would just sit and wait for an interrupt but this is cos i can't yet emulate an IRQ with an associated address that would make the code jump to the correct sound routine. Sadly this emulator won't jump to a location, only set breakpoints that can never be reached cos the code is basically a series of self contained routines that will never step all the way through. And the other emulator i tried doesnt work on a 64 bit PC and even when running on a 32 bit is flaky.

      heres a pic of the emulator window showing the RAM location writes (the x20 values) and the register states after running from the Boot up sound start to the ending BRA to self statement.

      def-rom-registers-boot.JPG

      below is an attempt to map out the register changes as i stepped through the code (hopefully the columns are retained within the code/code tags):
      Code:
        A   | B   | X     |   NOTES
      ---------------------------------
          added ORG 0500 to get RAM, PIA, DAC, etc locations free for simulator to write to (should be ORG $F800)
        xFF         0400      <- START (DAC output)
        x37
        x3C
        x00
                              <- PARAM1
                    FD76      (SAW wave start, $40 - 64)
                              <- CALCOS
        x76
                              <- PARAM1
              x09
                              <- UTIL1
        x20
                    0013      write to mem location value (x20, 32 dec) in accum A (RAM mem locations $0000 - $007F):
                    0014        STAA $00,X
                    FD76      ($40 - 64)
                    FD77      ($01 - 1)
              x08
                    0014      
                    0015      
                    FD77      ($01 - 1)
                    FD78      ($00 - 0)
              x07
                    0015      
                    0016      
                    FD78      ($00 - 0)
                    FD79      ($10 - 16)
              x06
                    0016      
                    0017      
                    FD79      ($10 - 16)
                    FD7A      ($E1 - 225)
              x05
                    0017      
                    0018      
                    FD7A      ($E1 - 225)
                    FD7B      ($00 - 0)
              x04
                    0018      
                    0019      
                    FD7B      ($00 - 0)
                    FD7C      ($80 - 128)
              x03
                    0019      
                    001A      
                    FD7C      ($80 - 128)
                    FD7D      ($FF - 255)
              x02
                    001A      
                    001B      
                    FD7D      ($FF - 255)
                    FD7E      ($FF - 255)
              x01
                    001B      
                    001C      
                    FD7E      ($FF - 255)
                    FD7F      ($28 - 40)
              x00           <- BNE
        x76                 <- PULA
                            <- RTS
      This shows the jumps to the subroutines from the START where various locations and values are set/reset. Then it goes to a routine i named PARAM1 under the assumption that it sets specific parameters to be used with a SYNTH routine. In this instance it loads the starting address for a waveform assumed to be the sawtooth., Then it moves to the routine CALCOS (or calculate offset) then back to PARAM1 where accumulator B is set. This appears to works as a counter. Then its off to UTIL1 (which may need to be renamed, but i assume its a generic routine to modify a given waveform so it could be an effect). Here the routine loops with a BNE with writes to the global addresses for the RAM (locations within the 6802 MPU) the values of accumulator A (x20) and loads in the FDBs of the waveform starting at FD76 to FD7F. The decimal equivalents are written next to them above, so the waveform (without the RAM values "x" which i havent been able to access yet) goes x,x,64,1,x,x,1,0,x,x,0,16,x,x,16,225,x,x,225,0,x,x ,0,128,x,x,128,255,x,x,255,255,x,x,255,40

      well im sure everyones really fascinated

      From a software engineering perspective this stuff is interesting as they are using highly modularised, self contained routines in assembly in a manner similar to object oriented. By using labels for the routines they can move in/around and edit various sound routines without affecting the remaining program.

    3. #23
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      Well this is becoming a bit of an archival project as well as restoration and home brew/make a thing. I will get back to the hardware side of things next, but in the meantime this is another post on the software following the disassembly with the DASMx. The below is a function/routine map as far as i can tell from adding my own labels and reading the code/stepping through it etc. This is basically a way of me trying to figure out how the code jumps around to various routines. Anything named SYNTH has a DAC output. All the subloops modify the registers in some way and count down to 0 usually.

      Code:
      DEF rom routine map:
      
      [ROUTINE]/tab[SUB-ROUTINE]/tab[CONDITIONAL]/tab[TARGET]
      example:
      [SYNTH1][S1LP3][BEQ][DAC4]
      
      naming convention: S1LP3 == synth1, subloop 3
      
      RESET
        STDBY   
          BRA STDBY
        
      PARAM1
          (LDX	#$FD76 	;VVECT wave)
          JSR CALCOS
          JMP UTIL1
      
      SYNTH1
        DAC1
        LOOP1
        S1LP1
        S1LP2
        DAC2
        S1LP3
          BEQ		DAC4
          BNE		S1LP3
        DAC3
        DAC4
          BMI		S1LP5
        S1LP5
          BNE		S1LP1
          BEQ		EXIT1
          BNE		LOOP1
        EXIT1   
          RTS
      
      PARAM2
          BRA		S2LP2
        
      SYNTH2  
          BRA		S2LP2
        S2LP2
        DAC5
        LOOP2
        S2LP1
          BCC		S2LP3
        DAC6
        S2LP3
        S2LP4
          BNE		S2LP4
          BNE		S2LP1
          BNE		LOOP2
        EXIT2	
          RTS
      
      SYNTH3
          BRA		S3LP2
        S3LP2
        LOOP3
        S3LP1
        S3LP3
          BCC		DAC7
        DAC7
        S3LP4
          BNE		S3LP4
          BNE		S3LP3
          BEQ		EXIT3
          BEQ		S3LP1
          BRA		LOOP3
        EXIT3	
          RTS
        
      PARAM3
          BRA		SYNTH4
        
      PARAM4
          BRA		SYNTH4
          
      PARAM5
          BRA		SYNTH4
          
      SYNTH4
        LOOP4
        DAC8
        S4LP1
          BEQ		S4LP6
        S4LP6
          BHI		S4LP3
        S4LP2
          BEQ		S4LP5
        DAC9
          BCS		S4LP4
          BLS		S4LP2
          BRA		S4LP4
        S4LP3
          BEQ		S4LP5
        DAC10
          BCS		S4LP4
          BHI		S4LP3
        S4LP4
        DAC11
          BRA		S4LP1
        S4LP5
          BNE		LOOP4
          BNE		LOOP4
        EXIT4	
          RTS
        
      SYNTH5
        LOOP5
          BCS		S5LP2
          BRA		S5LP1
        S5LP1	
          BRA		S5LP3
        S5LP2
          BEQ		EXIT5
        S5LP3
        DAC12
          BRA		LOOP5
        EXIT5	
          RTS
        
      SYNTH6
        DAC13
        LOOP6
        S6LP1
          BNE		S6LP2
        DAC14
        S6LP2
        S6LP3
          BNE		S6LP3
          BPL		S6LP1
        DAC15
          BPL		LOOP6
        EXIT6	
          RTS
        
      SYNTH7
        S7LP1
          BNE		S7LP1
        LOOP7
        S7LP2
          BPL		S7LP3
        S7LP3
          BNE		S7LP2
        DAC16
          BNE		LOOP7
        S7LP4
          BEQ		S7LP6
          BNE		S7LP5
        S7LP5
        S7LP6
          BNE		S7LP4
          BNE		LOOP7
        EXIT7	
          RTS
        
      PARAM6
          RTS
        
      PARAM7
          (LDX	#$FDAA	;VVECT wave)
        P7LP1
          BEQ		P7LP4
          BEQ		P7LP2
          JSR		CALCOS
          BRA		P7LP1
        P7LP2
          JSR		CALCOS
        P7LP3
          BSR		S8LP3
          BNE		P7LP3
        P7LP4
          JMP		IRQ2
        
      PARAM8
          RTS
        
      PARAM9
          BEQ		SYNTH8
        STDBY2	
          BRA		STDBY2
      
      SYNTH8
          BLS		S8LP1
        S8LP1
          (LDX	#$FE41	;VVECT wave)
          JSR		CALCOS
          BSR		S8LP3
        S8LP2
          BSR		S8LP7
          BRA		S8LP2
        S8LP3
        S8LP4
          BEQ		S8LP6
          BEQ		S8LP5
          BRA		S8LP4
        S8LP5
        S8LP6
        S8LP7
        DAC17
          BEQ		EXIT8
          JMP		$0016	;?
        EXIT8	
          RTS
        
      UTIL1
        ULP1
          BNE		ULP1
          RTS
        
      PARAM10
          RTS
        
      PARAM11
          BNE		P11LP1
        P11LP1
          RTS
        
      UTIL2
          JSR		P13LP2
          JSR		P14LP2
        U2LP1
          JSR		P14LP3
          BRA		U2LP1
      
      PARAM12
          JSR		PARAM1
          BNE		P12LP1
        P12LP1
        P12LP2
          BRA		P12LP2
        P12LP3
          BNE		P12LP3
        P12LP4
          JSR		SYNTH1
          BRA		P12LP4
          
      PARAM13
          BNE		P13LP1
          BSR		P13LP2
          BRA		SYNTH9
        P13LP1	
          JMP		P14LP1
        P13LP2
          (LDX	#$FEEC	;VVECT wave)
          JSR		CALCOS
          (LDX	#$FE4D	;VVECT wave)
        P13LP3
          BMI		P13LP4
          JSR		CALCOS
          BRA		P13LP3
        P13LP4
          JSR		PARAM18
          JSR		PARAM19
          (LDX	#$FF55	;VVECT wave)
          JSR		CALCOS
          JSR		CALCOS
          RTS
      
      SYNTH9
        S9LP1
          BEQ		PARAM14
        LOOP9
        S9LP2
        S9LP3
          BNE		S9LP3
        DAC18
          BNE		S9LP2
          BRA		LOOP9
        
      PARAM14
          BSR		PARAM19
          BNE		S9LP1
          BNE		P17EXIT
        P14LP1
          BEQ		P17EXIT
          BEQ		P17EXIT
        P14LP2
        P14LP3
        P14LP4
          BMI		PARAM15
          BCS		P15LP1
          BRA		PARAM16
        
      PARAM15
          BEQ		P15LP1
          BCS		PARAM16
        P15LP1
          BEQ		P16LP1
          BRA		PARAM17
        
      PARAM16
          BNE		P16LP1
        P16LP1
          BNE		P14LP4
          BNE		PARAM17
          RTS
        
      PARAM17
          BEQ		P17LP1
          BSR		PARAM18
          BSR		PARAM19
        P17LP1	
          JMP		SYNTH9
        P17EXIT	
          RTS
          
      PARAM18
          JSR		UTIL1
          RTS
      
      PARAM19
          BEQ		EXIT9
        LOOP10
        P19LP1
          BNE		P19LP1
          BNE		LOOP10
        EXIT9	
          RTS
          
      IRQ
          BEQ		IR1LP2
          BPL		IR1LP1
          JSR		PARAM7
        IR1LP1
          JSR		PARAM9
        IR1LP2
          BEQ		IR1LP3
        IR1LP3
          BEQ		IR1LP4
        IR1LP4
          BNE		IR1LP7
          JSR		$EFFD	;?label
        IR1LP7
          BEQ		IRQ2
          BHI		IR1LP5
          JSR		P13LP2
          JSR		SYNTH9
          BRA		IRQ2
        IR1LP5
          BHI		IR1LP6
          (LDX	#$FD58	;VWTAB)
          BSR		CALCOS
          BRA		IRQ2
        IR1LP6
          JSR		PARAM1
          JSR		SYNTH1
          
      IRQ2
        IR2LP1
          BEQ		IR2LP1
          BEQ		IR2LP2
          JMP		SYNTH4
        IR2LP2
          JMP		UTIL2
          
      CALCOS
          BCC		CLP1
        CLP1
          RTS
          
      NMI
        N1LP1
          BNE		N1LP1
          BEQ		N1LP2
        N1LP2
          JSR		PARAM1
          JSR		SYNTH1
          BNE		NMI
          JSR		$EFFA	;?label
          BRA		NMI
          
      VWTAB   ;jump table FD58 to FD74. eg:
          FDB   $FB49
      
      VVECT   ;waveforms for pwm synth FD76 to FFF7?. eg: 
          FCB   $40,$01,$00,$10,$E1,$00,$80,$FF,$FF
      
      MVECT   ;motorola vector table. eg:
          FDB   IRQ     ;FFF8: FC B6
          FDB   RESET   ;FFFA: F8 01, Software Interrupt
          FDB   NMI     ;FFFC: FD 2F
          FDB   RESET   ;FFFE: F8 01, Hardware Interrupt    
        
      NOTES::
      -waveforms 4-64 bytes
      -frequency table 10-20 bytes
      -parametrically driven pwm synth
      - need to find the frequency table, possibly after VVECT  
      - priority system for incidental over background sounds
      - save state for background sounds
      this is from a rom named def12.716 which i assume is the pinball rom not Video Rom 1. I read a pinside forum post on how there may be different versions of roms for a given pinball and that its possible in some instances to use the "wrong" rom for a given pin, so i've started to make notes of the checksums. this rom is :
      ;File: SOUND12.716
      ;
      ;Size: 2048 bytes
      ;Checksum: AF3F
      ;CRC-32: CABAEC58

      with all the labels in use the programmers are free to locate any routine anywhere in memory and simply change the address that points to it in the VWTAB jump table.

      Its kind of easy to imagine that a given pin could have its sounds changed relatively easily by simply changing either the waveform bytes or parameter bytes. Assuming that the Synths are standard in some way, they could play a given waveform with a given set of parameters and sound completely different. If I get around to it id like to make a detailed comparison with rom from a different pin but same generation and see if that theory holds up. Plus id like to get the ram mapped/emulated somehow too.

    4. #24
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      The next part of this project is to build a hardware controller that can be used to test ROMs and boards out as well as possibly be used to play live. The idea on paper is to have three banks of 5 switches that can be triggered independently of each other. This isn't going to be a pretty build, but it should be functional. Firstly is to test out the switching idea with a bread board and a type 2 sound board:

      type-2-switch-test.jpg

      There are two ground buses and a 5 volt bus. One ground is connected to the sound selector pins on the sound board and the other is connected to common and is used for the LED. And there had to be a big arcade button somewhere too.

      This mockup was then committed to MDF and lots of short wires and soldering. Im trying to get better at connecting components by using wires and not big long blobs of solder, so an example of this is using the prongs of the LEDs to form the bus.

      triggerbox-switch-start.jpg

      and completed to this stage it looks like this:

      triggerbox-switch-bus-fin.jpg

      with all the sound select wires then going to a little matrix circuit that will eventually be connected the sound board itself, and the 5v, GND will go through this as well.

      triggerbox-switch-distro.jpg

    5. #25
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      Programmed a new rom for the pinball called Varkon, which is an odd but interesting looking game being built into an upright cabinet. The sounds for this are amazing and quite different from the earlier pins, with more emphasis placed on sounds with echo or delay effects added. Also of note is that this is the first rom ive listened to that does not use 0x23 for a reset/stop all sounds. instead it triggers off a longish oscillating pulse sound. The reset is moved to 0x25 and 0x26. I couldnt find any background sounds in this rom either, and so no modifier is used either, such as in Warlok. There are about 4 or 5 "standard" type sounds that are found on earlier pins but most seem to be specifically programmed for this pin. Several sounds seemed to be paired where the same sound plays but with a reversed direction of pitch change. Also they have added to the defender type blaster and explosion sounds by making them loop for longer with more of a pronounced degradation of sound to almost a white noise. Sounds great!

      the checks are :
      ; File: varkon.716
      ;
      ; Size: 2048 bytes
      ; Checksum: A694
      ; CRC-32: D13DB2BB
      ;
      ; CPU: Motorola 6802 (6800/6802/6808 family)

    6. #26
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      aight, heres the sample dump for Varkon. Usual things apply, such as start of samples will have ms of silence so for accurate triggering they will need editing. Same thing applies for looping with the addition of requiring appropriate endpoints.

      Also this rom is unusual in that sample #19 (0x23) has a sound while #21 (0x25) and #22 (0x26) are silent, reset type triggers. The roms ive checked so far that have background sounds seem to have them located near the reset so it would make sense that its a simple bitwise addition to get them to stop.
      Another thing for this one is it has two multi-tap sounds that increase pitch and speed with each tap, I didnt sample those other hits but if you want i can do so. These are sounds #01 (0x01) and #09 (0x09).

      14.1 MB rar file with ordered samples in stereo 32 bit wav format
      link:
      http://s000.tinyupload.com/index.php...00567204063617

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      Continuing the adventures in the hardware controller, i realised that i needed some diodes on all the switches. for those more experienced with electronics im sure thats obvious (nb: imgur large thumbs size)



      also the stop/reset (0x23) trigger arcade button gets diodes too as this is meant to override all. The power bus and trigger bus are all connected to a DB9 socket. I will run a cable from this controller box to the sound board box. And a note, to self mainly, that a null modem cable is not a fully populated DB9 cable. Which both makes sense and does not make sense. I separated the ground for triggering and a ground for the LEDs as this seemed to make sense for debugging etc.



      The frontside of the controller looks like this:



      the switches are a bit naff looking and i will need to either paint or make an overlay to cover them. But it shows the idea with LEDs on for bit 1 and off for 0. Each bank is then triggered with a satisfying whack of the button. The red button is reset and i imagined the green button would be used for looping background sounds. There is a need for debouncing but i havent figured out the circuit yet as each button is only connected to ground so a cap doesnt seem to be appropriate here.

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      This is a great project, I am a huge Williams fan and Defender is my favourite game.
      Just skimming through the thread on my phone will check it out properly when I get home to my PC.

      Sent from my SM-G920I using Aussie Arcade mobile app
      Head 2 Head Tassie Pinball & Arcade gaming meet is on again - Sat 11th of Nov - Click HERE for thread or PM for more info

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      Quote Originally Posted by kapGo View Post
      aight, heres the sample dump for Varkon. Usual things apply, such as start of samples will have ms of silence so for accurate triggering they will need editing. Same thing applies for looping with the addition of requiring appropriate endpoints.


      Another thing for this one is it has two multi-tap sounds that increase pitch and speed with each tap, I didnt sample those other hits but if you want i can do so. These are sounds #01 (0x01) and #09 (0x09).

      14.1 MB rar file with ordered samples in stereo 32 bit wav format
      link:
      http://s000.tinyupload.com/index.php...00567204063617
      Varkon has some cool sounds. I'm glad you did Varkon sound rom.

      Number 7, 20 and 27 have some cool explosion sounds.

      I can't get the "multi-tap" sounds to increase pitch but I'm only using VLC to play them back and hitting play while it is playing simply pauses.

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      Yeah Varkon sounds amazing, its an interesting concept for a pin too. I only recorded the first hit of those multi tap sounds as my hardware controller has a debounce problem that i havent got around to fixing yet. I am also slowly adding in the controller card so i can control the triggers via software which means no debounce, but it probably wont be ready for a couple of days. So if you want those multi taps i can record each hit as a separate sample and then you can edit them for loop points etc, maybe i can name them Varkon-01-01.wav Varkon-01-02.wav etc...

      im getting around to the other sound boards which are in various states, such as:



      theres the usual missing bits, resistors, caps, a crystal. one board came with Video Rom 3 (Robotron?) but it had a dangling leg on the ground pin, yikes. so i attempted to solder it so that i could at least dump the rom:



      it seems to be ok, so its back in the board. other issues are the PIAs, which all seem to be soldered to the board. This one (like before) has IRQB sticking high even with measurable activity on the inputs. so its time to buck up and desolder them and place sockets there:



      this took for-bloody-ever with a wick. some of the solder points seem to be thicker and have bigger pads, these took the longest.



      but it worked ok and its better to have sockets so everyone says

      also added a heatsink and i only mention it cos the TDA2002 amp is so nice and loud and i will marry it.


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